13 Nisan 2020 Pazartesi

makefile ve Variable Expansion

$(Varible) şeklinde kullanılır. Açıklaması şöyle.
I'm assuming that you've seen $(CC) in a Makefile where it serves as an expansion of the variable CC, which normally holds the name of the C compiler. The $(...) syntax for variable expansions in Makefiles is used whenever a variable with a multi-character name is expanded,...

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